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  Program Code : VHDLT30
  Program Name: VHDL Training Program 
  Duration          : 3 Days

Training Program Details
Contents
Day 1
Session I 
  • Introduction- Historical perspective, Concepts, Merits, Demerits, Design Styles and Applications.
  • Design Units - Entity, Architecture, Configuration, Package and Package body. Concept of Libraries.
  • Lab I 
Session II
  • Language Constructs - Comments, Literals, Identifiers, data objects, data types, data operators, keywords.
  • Lab2 
  • Design Styles - Data flow, structural and behavioral styles of coding.
  • Lab 3
Day 2
Session I 
  • Concurrent and Sequential statements 
    Concurrent statements - signal assignment, selective signal assignment, conditional signal assignment and for-generate statements
  • Sequential statements - if else, case, for loop, while loop, wait statements.
  • Lab 4 
Session II
  • Describing Sequential logic in VHDL
  • Delta Delay - concepts and lab
  • Variables and shared variables
  • Lab sessions
Day 3
Session I 
  • State machines - Mealy machines and Moore machines, single process and multiple process state machines, encoding schemes for state machines.
  • Lab 1
  • Memory 
  • Lab 2
  • Packages 
    Functions and Procedures
Session II
  • Introduction to File I/O Operations 
  • Lab 4
  • Case Study
  • Lab 5

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Course schedule

#  Code Start-Date Location Cost Per Participant Duration Registration Status Registration
1 VHDLT30 February - 21 , 2005 Noida Rs 15000/- 3 Days CLOSED  
2 VHDLT30 March - 22 , 2005 Bangalore Rs 15000/- 3 Days CLOSED  
3 VHDLT30 April - 12 , 2005 Bangalore Rs 15000/- 3 Days CLOSED  
4 VHDLT30 October - 10 , 2005 Bangalore Rs 15000/- 3 Days CLOSED  
5 VHDLT30 September - 27 , 2007 Hyderabad Rs 15000/- 3 Days CLOSED  

 
 
 
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